M8000 시리즈 BERT 테스트 솔루션

- Data rates up to 8.5 and 16 Gb/s expandable to 32 Gb/s
- 1 to 4 BERT channels in a 5-slot AXIe chassis
- Integrated and calibrated jitter injection: RJ, PJ1, PJ2, SJ, BUJ, sinusoidal level interference
  (common-mode and differential-mode), SSC (triangular and arbitrary, residual) and Clock/2
- 8 tap de-emphasis, positive and negative
- Integrated and adjustable ISI
- Interactive link training for PCI Express
- Built-in clock recovery and equalization
- All options and modules are upgradeable

- The J-BERT M8020A is designed for R&D and test engineers who characterize and verify compliance of chips, devices, boards and systems with serial I/O ports up to 16 Gb/s and 32 Gb/s in the consumer, computer, mobile computing, datacenter and communications industry.

- The J-BERT M8020A can be used to test popular serial bus standards, such as PCI Express®, SATA/SAS, DisplayPort, USB Super Speed, MIPI® M-PHY®, SD UHS-II, Fibre Channel, QPI, memory buses , backplanes, repeaters, active optical cables, Thunderbolt, 10/40 GbE/SFP+/QSFP, 100GbE/CFP2.

M8000 Series of BER Test Solutions