제품 정보
Introspect 제품
| Industry Challenges | Introspect Capability |
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- High data rates - Large channel counts - Tight skew requirements - Single-ended - Deterministic pattern timings |
- Up to 12.5 Gbps in the DDR relevant testers - Up to 112 channels in a configured setup - Deterministic, high-precision skew control - Pattern timeline technology - PurVue Analyzer™: Brand new I3C protocol-triggered real-time oscilloscope compatible with SV6E-X Mid-Frequency Digital Test Module, thus eliminating the need for external active probes or benchtop oscilloscopes. |
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SV7C Personalized SerDes Tester | All-in-one, phase-aligned bit error rate tester (BERT) and protocol exerciser and analyzer |
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SV7C-PAM3 12-Channel, PAM3 Bit Error Rate Tester | Highly Integrated BERT for GDDR7, USB4 Gen2, and more |
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RSH2 Remote Sampling Head | 12 Active Probes Integrated Into a Clean, Shielded Form Factor |
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RSH1 Remote Sampling Head | Clean Probing of Parallel Buses |
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M5512 GDDR7 Memory Test System | Award-winning ATE-on-Bench for GDDR7 Characterization and Test |
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SV7M-LPDDR5PA LPDDR5 Protocol Analyzer | High-Performance Debug, Compliance Validation, and Analysis |
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DDR5 SPD Device Hub CTS | Highly Integrated BERT for GDDR7, USB4 Gen2, and more |
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DDR5 RCD Sidebandbus | Highly Integrated BERT for GDDR7, USB4 Gen2, and more |
| Pattern Timelines for DDR4/DDR5 Testing |
| PV2 8 GHz Active Probe Introduction |
